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“Distribution of fields and charge carriers in cylindrical nanosize silicon-based metal-oxide-semiconductor structures”. Pokatilov EP, Fomin VM, Balaban SN, Gladilin VN, Klimin SN, Devreese JT, Magnus W, Schoenmaker W, Collaert N, van Rossum M, de Meyer K, Journal Of Applied Physics 85, 6625 (1999). http://doi.org/10.1063/1.370171
Keywords: A1 Journal article; Electron Microscopy for Materials Science (EMAT);
Impact Factor: 2.068
Times cited: 16
DOI: 10.1063/1.370171
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“Study of the intrinsic limitations of the contact resistance of metal/semiconductor interfaces through atomistic simulations”. Dabral A, Pourtois G, Sankaran K, Magnus W, Yu H, de de Meux AJ, Lu AKA, Clima S, Stokbro K, Schaekers M, Collaert N, Horiguchi N, Houssa M, ECS journal of solid state science and technology 7, N73 (2018). http://doi.org/10.1149/2.0041806JSS
Abstract: In this contribution, we report a fundamental study of the factors that set the contact resistivity between metals and highly doped n-type 2D and 3D semiconductors. We investigate the case of n-type doped Si contacted with amorphous TiSi combining first principles calculations with Non-Equilibrium Green functions transport simulations. The evolution of the intrinsic contact resistivity with the doping concentration is found to saturate at similar to 2 x 10(-10) Omega.cm(2) for the case of TiSi and imposes an intrinsic limit to the ultimate contact resistance achievable for n-doped Silamorphous-TiSi (aTiSi). The limit arises from the intrinsic properties of the semiconductors and of the metals such as their electron effective masses and Fermi energies. We illustrate that, in this regime, contacting heavy electron effective mass metals with semiconductor helps reducing the interface intrinsic contact resistivity. This observation seems to hold true regardless of the 3D character of the semiconductor, as illustrated for the case of three 2D semiconducting materials, namely MoS2, ZrS2 and HfS2. (C) The Author(s) 2018. Published by ECS.
Keywords: A1 Journal article; Condensed Matter Theory (CMT); Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
Impact Factor: 1.787
Times cited: 2
DOI: 10.1149/2.0041806JSS
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“Probing the intrinsic limitations of the contact resistance of metal/semiconductor interfaces through atomistic simulations”. Pourtois G, Dabral A, Sankaran K, Magnus W, Yu H, de de Meux AJ, Lu AKA, Clima S, Stokbro K, Schaekers M, Houssa M, Collaert N, Horiguchi N, Semiconductors, Dielectrics, And Metals For Nanoelectronics 15: In Memory Of Samares Kar , 303 (2017). http://doi.org/10.1149/08001.0303ECST
Abstract: In this contribution, we report a fundamental study of the factors that set the contact resistivity between metals and highly doped semiconductors. We investigate the case of n-type doped Si contacted with amorphous TiSi combining first-principles calculations with Non-Equilibrium Green functions transport simulations. The intrinsic contact resistivity is found to saturate at similar to 2x10(-10) Omega.cm(2) with the doping concentration and sets an intrinsic limit to the ultimate contact resistance achievable for n-doped Si vertical bar amorphous-TiSi. This limit arises from the intrinsic properties of the semiconductor and of the metal such as their electron effective masses and Fermi energies. We illustrate that, in this regime, contacting metals with a heavy electron effective mass helps reducing the interface intrinsic contact resistivity.
Keywords: P1 Proceeding; Engineering sciences. Technology; Condensed Matter Theory (CMT); Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
Times cited: 1
DOI: 10.1149/08001.0303ECST
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“Epitaxial CVD growth of ultra-thin Si passivation layers on strained Ge fin structures”. Loo R, Arimura H, Cott D, Witters L, Pourtois G, Schulze A, Douhard B, Vanherle W, Eneman G, Richard O, Favia P, Mitard J, Mocuta D, Langer R, Collaert N, Semiconductor Process Integration 10 , 241 (2017). http://doi.org/10.1149/08004.0241ECST
Abstract: Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET devices. We use Si4H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330 degrees C. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during the Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions.
Keywords: P1 Proceeding; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
DOI: 10.1149/08004.0241ECST
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“Self-consistent 30-band simulation approach for (non-)uniformly strained confined heterostructure tunnel field-effect transistors”. Verreck D, Verhulst AS, Van de Put ML, Sorée B, Magnus W, Collaert N, Mocuta A, Groeseneken G, Simulation of Semiconductor Processes and, Devices (SISPAD)AND DEVICES (SISPAD 2017) , 29 (2017)
Abstract: Heterostructures of III-V materials under a mechanical strain are being actively researched to enhance the performance of the tunnel field-effect transistor (TFET). In scaled III-V device structures, however, the interplay between the effects of strain and quantum confinement on the semiconductor band structure and hence the performance is highly non-trivial. We have therefore developed a computationally efficient quantum mechanical simulator Pharos, which enables self-consistent full-zone k.p-based simulations of III-V TFETs under a general non-uniform strain. We present the self-consistent procedure and demonstrate it on confined staggered bandgap GaAs0.5Sb0.5/In0.53Ga0.47As TFETs. We find a large performance degradation due to size-induced quantum confinement compared to non-confined devices. We show that some performance can be regained either by applying a uniform biaxial tensile strain or through the non-uniform strain profile at a lattice-mismatched heterostructure.
Keywords: P1 Proceeding; Condensed Matter Theory (CMT)
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“Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures”. Loo R, Arimura H, Cott D, Witters L, Pourtois G, Schulze A, Douhard B, Vanherle W, Eneman G, Richard O, Favia P, Mitard J, Mocuta D, Langer R, Collaert N, ECS journal of solid state science and technology 7, P66 (2018). http://doi.org/10.1149/2.0191802JSS
Abstract: Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET and Gate All Around devices. We use Si4H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330 degrees. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions. (C) The Author(s) 2018. Published by ECS.
Keywords: A1 Journal article; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
Impact Factor: 1.787
Times cited: 5
DOI: 10.1149/2.0191802JSS
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“Perspective of tunnel-FET for future low-power technology nodes”. Verhulst AS, Verreck D, Smets Q, Kao K-H, Van de Put M, Rooyackers R, Sorée B, Vandooren A, De Meyer K, Groeseneken G, Heyns MM, Mocuta A, Collaert N, Thean AV-Y, 2014 Ieee International Electron Devices Meeting (iedm) (2014)
Keywords: P1 Proceeding; Condensed Matter Theory (CMT)
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“Electric-field induced quantum broadening of the characteristic energy level of traps in semiconductors and oxides”. Mohammed M, Verhulst AS, Verreck D, Van de Put M, Simoen E, Sorée B, Kaczer B, Degraeve R, Mocuta A, Collaert N, Thean A, Groeseneken G, Journal of applied physics 120, 245704 (2016). http://doi.org/10.1063/1.4972482
Abstract: The trap-assisted tunneling (TAT) current in tunnel field-effect transistors (TFETs) is one of the crucial factors degrading the sub-60 mV/dec sub-threshold swing. To correctly predict the TAT currents, an accurate description of the trap is required. Since electric fields in TFETs typically reach beyond 10(6) V/cm, there is a need to quantify the impact of such high field on the traps. We use a quantum mechanical implementation based on the modified transfer matrix method to obtain the trap energy level. We present the qualitative impact of electric field on different trap configurations, locations, and host materials, including both semiconductors and oxides. We determine that there is an electric-field related trap level shift and level broadening. We find that these electric-field induced quantum effects can enhance the trap emission rates. Published by AIP Publishing.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 2.068
Times cited: 6
DOI: 10.1063/1.4972482
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“Non-uniform strain in lattice-mismatched heterostructure tunnel field-effect transistors”. Verreck D, Verhulst AS, Sorée B, Collaert N, Mocuta A, Thean A, Groeseneken G, Solid-State Device Research (ESSDERC), European Conference
T2 –, 46th European Solid-State Device Research Conference (ESSDERC) / 42nd, European Solid-State Circuits Conference (ESSCIRC), SEP 12-15, 2016, Lausanne, SWITZERLAND , 412 (2016)
Abstract: Because of its localized impact on the band structure, non-uniform strain at the heterojunction between lattice-mismatched materials has the potential to significantly enlarge the design space for tunnel-field effect transistors (TFET). However, the impact of a complex strain profile on TFET performance is difficult to predict. We have therefore developed a 2D quantum mechanical transport formalism capable of simulating the effects of a general non-uniform strain. We demonstrate the formalism for the GaAsxSb(1-x)/InyGa(1-y) As system and show that a performance improvement over a lattice-matched reference is indeed possible, allowing for relaxed requirements on the source doping. We also point out that the added design parameter of mismatch is not free, but limited by the desired effective bandgap at the tunnel junction.
Keywords: P1 Proceeding; Condensed Matter Theory (CMT)
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“Can p-channel tunnel field-effect transistors perform as good as n-channel?”.Verhulst AS, Verreck D, Pourghaderi MA, Van de Put M, Sorée B, Groeseneken G, Collaert N, Thean AV-Y, Applied physics letters 105, 043103 (2014). http://doi.org/10.1063/1.4891348
Abstract: We show that bulk semiconductor materials do not allow perfectly complementary p- and n-channel tunnel field-effect transistors (TFETs), due to the presence of a heavy-hole band. When tunneling in p-TFETs is oriented towards the gate-dielectric, field-induced quantum confinement results in a highest-energy subband which is heavy-hole like. In direct-bandgap IIIV materials, the most promising TFET materials, phonon-assisted tunneling to this subband degrades the subthreshold swing and leads to at least 10x smaller on-current than the desired ballistic on-current. This is demonstrated with quantum-mechanical predictions for p-TFETs with tunneling orthogonal to the gate, made out of InP, In0.53Ga0.47As, InAs, and a modified version of In0.53Ga0.47As with an artificially increased conduction-band density-of-states. We further show that even if the phonon-assisted current would be negligible, the build-up of a heavy-hole-based inversion layer prevents efficient ballistic tunneling, especially at low supply voltages. For p-TFET, a strongly confined n-i-p or n-p-i-p configuration is therefore recommended, as well as a tensily strained line-tunneling configuration. (C) 2014 AIP Publishing LLC.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 3.411
Times cited: 8
DOI: 10.1063/1.4891348
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“Uniform strain in heterostructure tunnel field-effect transistors”. Verreck D, Verhulst AS, Van de Put ML, Sorée B, Collaert N, Mocuta A, Thean A, Groeseneken G, IEEE electron device letters 37, 337 (2016). http://doi.org/10.1109/LED.2016.2519681
Abstract: Strain can strongly impact the performance of III-V tunnel field-effect transistors (TFETs). However, previous studies on homostructure TFETs have found an increase in ON-current to be accompanied with a degradation of subthreshold swing. We perform 30-band quantum mechanical simulations of staggered heterostructure p-n-i-n TFETs submitted to uniaxial and biaxial uniform stress and find the origin of the subthreshold degradation to be a reduction of the density of states in the strained case. We apply an alternative configuration including a lowly doped pocket in the source, which allows to take full benefit of the strain-induced increase in ON-current.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 3.048
Times cited: 17
DOI: 10.1109/LED.2016.2519681
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“Full-zone spectral envelope function formalism for the optimization of line and point tunnel field-effect transistors”. Verreck D, Verhulst AS, Van de Put M, Sorée B, Magnus W, Mocuta A, Collaert N, Thean A, Groeseneken G, Journal of applied physics 118, 134502 (2015). http://doi.org/10.1063/1.4931890
Abstract: Efficient quantum mechanical simulation of tunnel field-effect transistors (TFETs) is indispensable to allow for an optimal configuration identification. We therefore present a full-zone 15-band quantum mechanical solver based on the envelope function formalism and employing a spectral method to reduce computational complexity and handle spurious solutions. We demonstrate the versatility of the solver by simulating a 40 nm wide In0.53Ga0.47As lineTFET and comparing it to p-n-i-n configurations with various pocket and body thicknesses. We find that the lineTFET performance is not degraded compared to semi-classical simulations. Furthermore, we show that a suitably optimized p-n-i-n TFET can obtain similar performance to the lineTFET. (C) 2015 AIP Publishing LLC.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 2.068
Times cited: 9
DOI: 10.1063/1.4931890
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“Improved source design for p-type tunnel field-effect transistors : towards truly complementary logic”. Verreck D, Verhulst AS, Sorée B, Collaert N, Mocuta A, Thean A, Groeseneken G, Applied physics letters 105, 243506 (2014). http://doi.org/10.1063/1.4904712
Abstract: Complementary logic based on tunnel field-effect transistors (TFETs) would drastically reduce power consumption thanks to the TFET's potential to obtain a sub-60 mV/dec subthreshold swing (SS). However, p-type TFETs typically do not meet the performance of n-TFETs for direct bandgap III-V configurations. The p-TFET SS stays well above 60 mV/dec, due to the low density of states in the conduction band. We therefore propose a source configuration in which a highly doped region is maintained only near the tunnel junction. In the remaining part of the source, the hot carriers in the exponential tail of the Fermi-Dirac distribution are blocked by reducing the doping degeneracy, either with a source section with a lower doping concentration or with a heterostructure. We apply this concept to n-p-i-p configurations consisting of In0.53Ga0.47As and an InP-InAs heterostructure. 15-band quantum mechanical simulations predict that the configurations with our source design can obtain sub-60 mV/dec SS, with an on-current comparable to the conventional source design. (C) 2014 AIP Publishing LLC.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 3.411
Times cited: 10
DOI: 10.1063/1.4904712
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“InGaAs tunnel diodes for the calibration of semi-classical and quantum mechanical band-to-band tunneling models”. Smets Q, Verreck D, Verhulst AS, Rooyackers R, Merckling C, Van De Put M, Simoen E, Vandervorst W, Collaert N, Thean VY, Sorée B, Groeseneken G, Heyns MM;, Journal of applied physics 115, 184503 (2014). http://doi.org/10.1063/1.4875535
Abstract: Promising predictions are made for III-V tunnel-field-effect transistor (FET), but there is still uncertainty on the parameters used in the band-to-band tunneling models. Therefore, two simulators are calibrated in this paper; the first one uses a semi-classical tunneling model based on Kane's formalism, and the second one is a quantum mechanical simulator implemented with an envelope function formalism. The calibration is done for In0.53Ga0.47As using several p+/intrinsic/n+ diodes with different intrinsic region thicknesses. The dopant profile is determined by SIMS and capacitance-voltage measurements. Error bars are used based on statistical and systematic uncertainties in the measurement techniques. The obtained parameters are in close agreement with theoretically predicted values and validate the semi-classical and quantum mechanical models. Finally, the models are applied to predict the input characteristics of In0.53Ga0.47As n- and p-lineTFET, with the n-lineTFET showing competitive performance compared to MOSFET.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 2.068
Times cited: 34
DOI: 10.1063/1.4875535
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“Quantum mechanical solver for confined heterostructure tunnel field-effect transistors”. Verreck D, Van de Put M, Sorée B, Verhulst AS, Magnus W, Vandenberghe WG, Collaert N, Thean A, Groeseneken G, Journal of applied physics 115, 053706 (2014). http://doi.org/10.1063/1.4864128
Abstract: Heterostructure tunnel field-effect transistors (HTFET) are promising candidates for low-power applications in future technology nodes, as they are predicted to offer high on-currents, combined with a sub-60 mV/dec subthreshold swing. However, the effects of important quantum mechanical phenomena like size confinement at the heterojunction are not well understood, due to the theoretical and computational difficulties in modeling realistic heterostructures. We therefore present a ballistic quantum transport formalism, combining a novel envelope function approach for semiconductor heterostructures with the multiband quantum transmitting boundary method, which we extend to 2D potentials. We demonstrate an implementation of a 2-band version of the formalism and apply it to study confinement in realistic heterostructure diodes and p-n-i-n HTFETs. For the diodes, both transmission probabilities and current densities are found to decrease with stronger confinement. For the p-n-i-n HTFETs, the improved gate control is found to counteract the deterioration due to confinement. (C) 2014 AIP Publishing LLC.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 2.068
Times cited: 15
DOI: 10.1063/1.4864128
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“Titanium (germano-)silicides featuring 10-9 Ω.cm2 contact resistivity and improved compatibility to advanced CMOS technology”. Yu H, Schaekers M, Chew SA, Eyeraert J-L, Dabral A, Pourtois G, Horiguchi N, Mocuta D, Collaert N, De Meyer K, 2018 18th International Workshop On Junction Technology (iwjt) , 80 (2018)
Abstract: uIn this work, we discuss three novel Ti (germano-)silicidation techniques featuring respectively the pre-contact amorphization implantation (PCAI), the TiSi co-deposition, and Ti atomic layer deposition (ALD). All three techniques form TiSix(Ge-y) contacts with ultralow contact resistivity (rho(c)) of (1-3)x10(-9) Omega.cm(2) on both highly doped n-Si and p-SiGe substrates: these techniques meet rho(c) requirement of 5-14 nm CMOS technology and feature unified CMOS contact solutions. We further discuss the compatibility of these techniques to the realistic CMOS transistor fabrication.
Keywords: P1 Proceeding; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
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“Self-consistent procedure including envelope function normalization for full-zone Schrodinger-Poisson problems with transmitting boundary conditions”. Verreck D, Verhulst AS, Van de Put ML, Sorée B, Magnus W, Collaert N, Mocuta A, Groeseneken G, Journal of applied physics 124, 204501 (2018). http://doi.org/10.1063/1.5047087
Abstract: In the quantum mechanical simulation of exploratory semiconductor devices, continuum methods based on a k.p/envelope function model have the potential to significantly reduce the computational burden compared to prevalent atomistic methods. However, full-zone k.p/envelope function simulation approaches are scarce and existing implementations are not self-consistent with the calculation of the electrostatic potential due to the lack of a stable procedure and a proper normalization of the multi-band envelope functions. Here, we therefore present a self-consistent procedure based on a full-zone spectral k.p/envelope function band structure model. First, we develop a proper normalization for the multi-band envelope functions in the presence of transmitting boundary conditions. This enables the calculation of the free carrier densities. Next, we construct a procedure to obtain self-consistency of the carrier densities with the electrostatic potential. This procedure is stabilized with an adaptive scheme that relies on the solution of Poisson's equation in the Gummel form, combined with successive underrelaxation. Finally, we apply our procedure to homostructure In0.53Ga0.47As tunnel field-effect transistors (TFETs) and staggered heterostructure GaAs0.5Sb0.5/In0.53Ga0.47As TFETs and show the importance of self-consistency on the device predictions for scaled dimensions. Published by AIP Publishing.
Keywords: A1 Journal article; Condensed Matter Theory (CMT)
Impact Factor: 2.068
Times cited: 1
DOI: 10.1063/1.5047087
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