Abstract: Simulation results of electrostatics in Si cylindrical junctionless nanowire transistors with a homogenous channel are presented. Junctionless transistors including strain and arbitrary crystallographic orientations are studied. Size quantization effects are simulated by self-consistent solutions of the Poisson and Schrodinger equations. The 6 x 6 k.p method is employed for the calculation of the valence subband structure in a junctionless nanowire pFET. The influence of stress/strain and crystallographic channel orientation on to the electrostatics in terms of subband structure, charge density, and C-V curve is systematically studied. (C) 2011 Elsevier Ltd. All rights reserved.

Abstract: Recent years have seen a tremendous rise of two-dimensional (2D) magnetic materials, several of which were verified experimentally. However, most of the theoretical predictions to date rely on ab initio methods, at zero temperature and fluctuation-free, while one certainly expects detrimental quantum fluctuations at finite temperatures. Here, we present the solution of the quantum Heisenberg model for honeycomb/hexagonal lattices with anisotropic exchange interaction up to third nearest neighbors and in an applied field in arbitrary direction, which answers the question whether long-range magnetization can indeed survive in the ultrathin limit of materials, up to which temperature, and what the characteristic excitation (magnon) frequencies are, all essential to envisaged applications of magnetic 2D materials. We find that long-range magnetic order persists at finite temperature for materials with overall easy-axis anisotropy. We validate the calculations on the examples of monolayers CrI3, CrBr3, and MnSe2. Moreover, we provide an easy-to-use tool to calculate Curie temperatures of new 2D computational materials.

Abstract: Promising predictions are made for III-V tunnel-field-effect transistor (FET), but there is still uncertainty on the parameters used in the band-to-band tunneling models. Therefore, two simulators are calibrated in this paper; the first one uses a semi-classical tunneling model based on Kane's formalism, and the second one is a quantum mechanical simulator implemented with an envelope function formalism. The calibration is done for In0.53Ga0.47As using several p+/intrinsic/n+ diodes with different intrinsic region thicknesses. The dopant profile is determined by SIMS and capacitance-voltage measurements. Error bars are used based on statistical and systematic uncertainties in the measurement techniques. The obtained parameters are in close agreement with theoretically predicted values and validate the semi-classical and quantum mechanical models. Finally, the models are applied to predict the input characteristics of In0.53Ga0.47As n- and p-lineTFET, with the n-lineTFET showing competitive performance compared to MOSFET.

Abstract: Non-charge-based logic devices are promising candidates for future logic circuits. Interest in studying and developing these devices has grown dramatically in the past decade as they possess key advantages over conventional CMOS technology. Due to their novel designs, a large number of micromagnetic simulations are required to fully characterize the behavior of these devices. The number and complexity of these simulations place large computational requirements on device development. We use state-of-the-art machine learning techniques to expedite identification of their behavior. Several intelligent sampling strategies are combined with machine learning multi-class classification models. These techniques are applied to a recently developed exchange-driven magnetic logic scheme that utilizes direct exchange coupling as the main driver.

Abstract: It is generally understood that the resistivity of metal thin films scales with film thickness mainly due to grain boundary and boundary surface scattering. Recently, several experiments and ab initio simulations have demonstrated the impact of crystal orientation on resistivity scaling. The crystal orientation cannot be captured by the commonly used resistivity scaling models and a qualitative understanding of its impact is currently lacking. In this work, we derive a resistivity scaling model that captures grain boundary and boundary surface scattering as well as the anisotropy of the band structure. The model is applied to Cu and Ru thin films, whose conduction bands are (quasi-) isotropic and anisotropic, respectively. After calibrating the anisotropy with ab initio simulations, the resistivity scaling models are compared to experimental resistivity data and a renormalization of the fitted grain boundary reflection coefficient can be identified for textured Ru.

Abstract: In this work we investigate quantum ballistic transport in ultrasmall junctionless and inversion mode semiconducting nanowire transistors within the framework of the self-consistent Schrödinger-Poisson problem. The quantum transmitting boundary method is used to generate open boundary conditions between the active region and the electron reservoirs. We adopt a subband decomposition approach to make the problem numerically tractable and make a comparison of four different numerical approaches to solve the self-consistent Schrödinger-Poisson problem. Finally we discuss the IV-characteristics for small (r≤5 nm) GaAs nanowire transistors. The novel junctionless pinch-off FET or junctionless nanowire transistor is extensively compared with the gate-all-around (GAA) nanowire MOSFET.

Abstract: In this theoretical study, we assess the impact of a graphene capping layer on the resistivity of defective, extremely scaled interconnects. We investigate the effect of graphene capping on the electronic transport in ultrascaled interconnects, in the presence of grain boundary defects in the metal layer. We compare the results obtained using our quantum mechanical model to a simple parallel-conductor model and find that the parallel-conductor model does not capture the effect of the graphene cap correctly. At 0.5 nm metal thickness, the parallel-conductor model underestimates the conductivity by 3.0% to 4.0% for single-sided and double sided graphene capping, respectively.

Abstract: In this paper we investigate the basic physics of charge carriers (electrons) leaking out of the inversion layer of a metal-oxide-semiconductor capacitor with a biased gate. In particular, we treat the gate leakage current as resulting from two combined processes: (1) the time-dependent decay of electron wave packets representing the inversion-layer charge and (2) the local generation of new electrons replacing those that have leaked away. As a result, the gate current simply emerges as the ratio of the total charge in the inversion layer to the tunneling lifetime. The latter is extracted from the quantum dynamics of the decaying wave packets, while the generation rate is incorporated as a phenomenological source term in the continuity equation. Not only do the gate currents calculated with this model agree very well with experiment, the model also provides an onset to solve the paradox of the current-free bound states representing the resonances of the Schrödinger equation that governs the fully coupled metal-oxide-semiconductor system.

Abstract: Heterostructures of III-V materials under a mechanical strain are being actively researched to enhance the performance of the tunnel field-effect transistor (TFET). In scaled III-V device structures, however, the interplay between the effects of strain and quantum confinement on the semiconductor band structure and hence the performance is highly non-trivial. We have therefore developed a computationally efficient quantum mechanical simulator Pharos, which enables self-consistent full-zone k.p-based simulations of III-V TFETs under a general non-uniform strain. We present the self-consistent procedure and demonstrate it on confined staggered bandgap GaAs0.5Sb0.5/In0.53Ga0.47As TFETs. We find a large performance degradation due to size-induced quantum confinement compared to non-confined devices. We show that some performance can be regained either by applying a uniform biaxial tensile strain or through the non-uniform strain profile at a lattice-mismatched heterostructure.

Abstract: Group IV based tunnel field-effect transistors generally show lower on-current than III-V based devices because of the weaker phonon-assisted tunneling transitions in the group IV indirect bandgap materials. Direct tunneling in Ge, however, can be enhanced by strain engineering. In this work, we use a 30-band k.p method to calculate the band structure of biaxial tensile strained Ge and then extract the bandgaps and effective masses at Gamma and L symmetry points in k-space, from which the parameters for the direct and indirect band-to-band tunneling (BTBT) models are determined. While transitions from the heavy and light hole valence bands to the conduction band edge at the L point are always bridged by phonon scattering, we highlight a new finding that only the light-holelike valence band is strongly coupling to the conduction band at the Gamma point even in the presence of strain based on the 30-band k.p analysis. By utilizing a Technology Computer Aided Design simulator equipped with the calculated band-to-band tunneling BTBT models, the electrical characteristics of tensile strained Ge point and line tunneling devices are self-consistently computed considering multiple dynamic nonlocal tunnel paths. The influence of field-induced quantum confinement on the tunneling onset is included. Our simulation predicts that an on-current up to 160 (260) mu A/mu m can be achieved along with on/off ratio > 10(6) for V-DD = 0.5V by the n-type (p-type) line tunneling device made of 2.5% biaxial tensile strained Ge. (C) 2014 AIP Publishing LLC.

Abstract: Germanium is a widely used material for tunnel FETs because of its small band gap and compatibility with silicon. Typically, only the indirect band gap of Ge at 0.66 eV is considered. However, direct band-to-band tunneling (BTBT) in Ge should be included in tunnel FET modeling and simulations since the energy difference between the Ge conduction band edges at the L and G valleys is only 0.14 eV at room temperature. In this paper, we theoretically calculate the parameters A and B of Kane's direct and indirect BTBT models at different tunneling directions ([100], [110], and [111]) for Si, Ge and unstrained Si1-xGex. We highlight how the direct BTBT component becomes more important as the Ge mole fraction increases. The calculation of the band-to-band generation rate in the uniform electric field limit reveals that direct tunneling always dominates over indirect tunneling in Ge. The impact of the direct transition in Ge on the performance of two realistic tunnel field-effect transistor configurations is illustrated with TCAD simulations. The influence of field-induced quantum confinement is included in the analysis based on a back-of-the-envelope calculation.

Abstract: Fermi's golden rule underpins the investigation of mobile carriers propagating through various solids, being a standard tool to calculate their scattering rates. As such, it provides a perturbative estimate under the implicit assumption that the effect of the interaction Hamiltonian which causes the scattering events is sufficiently small. To check the validity of this assumption, we present a general framework to derive simple validity criteria in order to assess whether the scattering rates can be trusted for the system under consideration, given its statistical properties such as average size, electron density, impurity density et cetera. We derive concrete validity criteria for metallic nanowires with conduction electrons populating a single parabolic band subjected to different elastic scattering mechanisms: impurities, grain boundaries and surface roughness.

Abstract: Electronic devices that work in the quantum regime often employ hybrid nanostructures to bring about a nonlinear behaviour. The nonlinearity that these can provide has proven to be useful, in particular, for applications in quantum computation. Here we present a hybrid device that acts as a capacitor with a nonlinear charge-voltage relation. The device consists of a nanowire placed between the plates of a coplanar capacitor, with a co-parallel alignment. At low temperatures, due to the finite density of states on the nanowire, the charge distribution in the capacitor is uneven and energy-dependent, resulting in a charge-dependent effective capacitance. We study this system analytically and numerically, and show that the nonlinearity of the capacitance is significant enough to be utilized in circuit quantum electrodynamics. The resulting nonlinearity can be switched on, modulated, and switched off by an external potential, thus making this capacitive device highly versatile for uses in quantum computation.

Abstract: Discrepancies exist between the theoretically predicted and experimentally measured performance of band-to-band tunneling devices, such as Esaki diodes and tunnel field-effect transistors (TFETs). We resolve this discrepancy for highly-doped, direct-bandgap Esaki diodes by successfully calibrating a semi-classical model for high-doping-induced ballistic band-tails tunneling currents at multiple temperatures with two In0.53Ga0.47As Esaki diodes using their SIMS doping profiles, C-V characteristics and their forward-bias current density in the negative differential resistance (NDR) regime. The current swing in the NDR regime is shown not to be linked to the band-tails Urbach energy. We further demonstrate theoretically that the calibrated band-tails contribution is also the dominant band-tails contribution to the subthreshold swing of the corresponding TFETs. Lastly, we verify that the presented procedure is applicable to all direct-bandgap semiconductors by successfully applying it to InAs Esaki diodes in literature.

Abstract: Conventional junctionless (JL) multi/gate (MuG) field-effect transistors (FETs) require extremely scaled channels to deliver high on-state current with low short-channel effect related leakage. In this letter, using ultra-thin 2D materials (e.g., monolayer MoS2), we present comparison of short-channel effects in JL, and inversion-mode (IM) FETs. We show that JL FETs exhibit better sub-threshold slope (S.S.) and drain-induced-barrier-lowering (DIBL) in comparison to IM FETs due to reduced peak electric field at the junctions. But, threshold voltage (VT) roll-off with channel length downscaling is found to be significantly higher in JL FETs than IM FETs, due to higher source/drain controlled charges (dE/dx) in the channel. Further, we show that although VT roll-off in JL FETs improves by increasing the gate control, i.e., by scaling the oxide, or channel thickness, the sensitivity of threshold voltage on structural parameters is found out to be high. (C) 2016 AIP Publishing LLC.