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Author Doevenspeck, J.; Zografos, O.; Gurunarayanan, S.; Lauwereins, R.; Raghavan, P.; Sorée, B. url  doi
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  Title Design and simulation of plasmonic interference-based majority gate Type A1 Journal article
  Year (down) 2017 Publication AIP advances Abbreviated Journal  
  Volume 7 Issue 6 Pages 065116  
  Keywords A1 Journal article; Engineering sciences. Technology; Condensed Matter Theory (CMT)  
  Abstract Major obstacles in current CMOS technology, such as the interconnect bottleneck and thermal heat management, can be overcome by employing subwavelength-scaled light in plasmonic waveguides and devices. In this work, a plasmonic structure that implements the majority (MAJ) gate function is designed and thoroughly studied through simulations. The structure consists of three merging waveguides, serving as the MAJ gate inputs. The information of the logic signals is encoded in the phase of transmitted surface plasmon polaritons (SPP). SPPs are excited at all three inputs and the phase of the output SPP is determined by theMAJof the input phases. The operating dimensions are identified and the functionality is verified for all input combinations. This is the first reported simulation of a plasmonic MAJ gate and thus contributes to the field of optical computing at the nanoscale. (C) 2017 Author(s).  
  Address  
  Corporate Author Thesis  
  Publisher Place of Publication Editor  
  Language Wos 000404621200036 Publication Date 2017-06-23  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 2158-3226 ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor Times cited Open Access  
  Notes Approved no  
  Call Number UA @ admin @ c:irua:152632 Serial 7764  
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