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Author |
Loo, R.; Arimura, H.; Cott, D.; Witters, L.; Pourtois, G.; Schulze, A.; Douhard, B.; Vanherle, W.; Eneman, G.; Richard, O.; Favia, P.; Mitard, J.; Mocuta, D.; Langer, R.; Collaert, N. |
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Title |
Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures |
Type |
A1 Journal article |
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Year |
2018 |
Publication |
ECS journal of solid state science and technology |
Abbreviated Journal |
Ecs J Solid State Sc |
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Volume |
7 |
Issue |
2 |
Pages |
P66-P72 |
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Keywords |
A1 Journal article; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT) |
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Abstract |
Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET and Gate All Around devices. We use Si4H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330 degrees. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions. (C) The Author(s) 2018. Published by ECS. |
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Publisher |
Electrochemical society |
Place of Publication |
Pennington (N.J.) |
Editor |
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Wos |
000425215200010 |
Publication Date |
2018-01-21 |
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Edition |
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ISSN |
2162-8769; 2162-8777 |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
1.787 |
Times cited |
5 |
Open Access |
OpenAccess |
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Notes |
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Approved |
Most recent IF: 1.787 |
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Call Number |
UA @ lucian @ c:irua:149326 |
Serial |
4933 |
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Permanent link to this record |