Abstract: Utilizing magnetic tunnel junctions (MTJs) for write/read and fast spin-orbit-torque (SOT)-driven domain-wall (DW) motion for propagation, enables non-volatile logic and majority operations, representing a breakthrough in the implementation of nanoscale DW logic devices. Recently, current-driven DW logic gates have been demonstrated via magnetic imaging, where the Dzyaloshinskii-Moriya interaction (DMI) induces chiral coupling between perpendicular magnetic anisotropy (PMA) regions via an in-plane (IP) oriented region. However, full electrical operation of nanoscale DW logic requires electrical write/read operations and a method to pattern PMA and IP regions compatible with the fabrication of PMA MTJs. Here, we study the use of a Hybrid Free Layer (HFL) concept to combine an MTJ stack with DW motion materials, and He+ ion irradiation to convert the stack from PMA to IP. First, we investigate the free layer thickness dependence of 100-nm diameter HFL-MTJ devices and find an optimal CoFeB thickness, from 7 to 10 angstrom, providing high tunneling magnetoresistance (TMR) readout and efficient spin-transfer torque (STT) writing. We then show that high DMI materials, like Pt/Co, can be integrated into an MTJ stack via interlayer exchange coupling with the CoFeB free layer. In this design, DMI values suitable for SOT-driven DW motion are measured by asymmetric bubble expansion. Finally, we demonstrate that He+ irradiation reliably converts the coupled free layers from PMA to IP. These findings offer a path toward the integration of fully electrically controlled DW logic circuits.

Abstract: Over the past few decades, superconducting circuits have been used to realize various novel electronic devices such as quantum bits, SQUIDs, parametric amplifiers, etc. One domain, however, where superconducting circuits fall short is information storage. Superconducting memories are based on the quantization of magnetic flux in superconducting loops. Standard implementations store information as magnetic flux quanta in a superconducting loop interrupted by two Josephson junctions (i.e., a SQUID). However, due to the large inductance required, the size of the SQUID loop cannot be scaled below several micrometers, resulting in low-density memory chips. Here, we propose a scalable memory consisting of a voltage-biased superconducting ring threaded by a half-quantum flux bias. By numerically solving the time-dependent Ginzburg-Landau equations, we show that applying a time-dependent bias voltage in the microwave range constitutes a writing mechanism to change the number of stored flux quanta within the ring. Since the proposed device does not require a large loop inductance, it can be scaled down, enabling a high-density memory technology. (C) 2019 Author(s).

Abstract: Thermal fluctuations play an increasingly important role in micromagnetic research relevant for various biomedical and other technological applications. Until now, it was deemed necessary to use a time stepping algorithm with a fixed time step in order to perform micromagnetic simulations at nonzero temperatures. However, Berkov and Gorn have shown in [D. Berkov and N. Gorn, J. Phys.: Condens. Matter,14, L281, 2002] that the drift term which generally appears when solving stochastic differential equations can only influence the length of the magnetization. This quantity is however fixed in the case of the stochastic Landau-Lifshitz-Gilbert equation. In this paper, we exploit this fact to straightforwardly extend existing high order solvers with an adaptive time stepping algorithm. We implemented the presented methods in the freely available GPU-accelerated micromagnetic software package MuMax3 and used it to extensively validate the presented methods. Next to the advantage of having control over the error tolerance, we report a twenty fold speedup without a loss of accuracy, when using the presented methods as compared to the hereto best practice of using Heun’s solver with a small fixed time step.

Abstract: A spin wave majority fork-like structure with feature size of 40 nm, is presented and investigated, through micromagnetic simulations. The structure consists of three merging out-of-plane magnetization spin wave buses and four magneto-electric cells serving as three inputs and an output. The information of the logic signals is encoded in the phase of the transmitted spin waves and subsequently stored as direction of magnetization of the magneto-electric cells upon detection. The minimum dimensions of the structure that produce an operational majority gate are identified. For all input combinations, the detection scheme employed manages to capture the majority phase result of the spin wave interference and ignore all reflection effects induced by the geometry of the structure. (C) 2017 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).