Abstract: Utilizing magnetic tunnel junctions (MTJs) for write/read and fast spin-orbit-torque (SOT)-driven domain-wall (DW) motion for propagation, enables non-volatile logic and majority operations, representing a breakthrough in the implementation of nanoscale DW logic devices. Recently, current-driven DW logic gates have been demonstrated via magnetic imaging, where the Dzyaloshinskii-Moriya interaction (DMI) induces chiral coupling between perpendicular magnetic anisotropy (PMA) regions via an in-plane (IP) oriented region. However, full electrical operation of nanoscale DW logic requires electrical write/read operations and a method to pattern PMA and IP regions compatible with the fabrication of PMA MTJs. Here, we study the use of a Hybrid Free Layer (HFL) concept to combine an MTJ stack with DW motion materials, and He+ ion irradiation to convert the stack from PMA to IP. First, we investigate the free layer thickness dependence of 100-nm diameter HFL-MTJ devices and find an optimal CoFeB thickness, from 7 to 10 angstrom, providing high tunneling magnetoresistance (TMR) readout and efficient spin-transfer torque (STT) writing. We then show that high DMI materials, like Pt/Co, can be integrated into an MTJ stack via interlayer exchange coupling with the CoFeB free layer. In this design, DMI values suitable for SOT-driven DW motion are measured by asymmetric bubble expansion. Finally, we demonstrate that He+ irradiation reliably converts the coupled free layers from PMA to IP. These findings offer a path toward the integration of fully electrically controlled DW logic circuits.

Abstract: We have discovered two novel types of planar defects that appear in heteroepitaxial YBa2Cu3O7-delta(YBCO123) thin films, grown by pulsed-laser deposition (PLD) either with or without a La2/3Ca1/3MnO3 (LCMO) overlayer, using the combination of highangle annular dark-field scanning transmission electron microscopy (HAADF-STEM) imaging and electron energy loss spectroscopy (EELS) mapping for unambiguous identification. These planar lattice defects are based on the intergrowth of either a BaO plane between two CuO chains or multiple Y-O layers between two CuO2 planes, resulting in non-stoichiometric layer sequences that could directly impact the high-Tc superconductivity. (C) 2018 Author(s).

Abstract: Major obstacles in current CMOS technology, such as the interconnect bottleneck and thermal heat management, can be overcome by employing subwavelength-scaled light in plasmonic waveguides and devices. In this work, a plasmonic structure that implements the majority (MAJ) gate function is designed and thoroughly studied through simulations. The structure consists of three merging waveguides, serving as the MAJ gate inputs. The information of the logic signals is encoded in the phase of transmitted surface plasmon polaritons (SPP). SPPs are excited at all three inputs and the phase of the output SPP is determined by theMAJof the input phases. The operating dimensions are identified and the functionality is verified for all input combinations. This is the first reported simulation of a plasmonic MAJ gate and thus contributes to the field of optical computing at the nanoscale. (C) 2017 Author(s).