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Author Loo, R.; Arimura, H.; Cott, D.; Witters, L.; Pourtois, G.; Schulze, A.; Douhard, B.; Vanherle, W.; Eneman, G.; Richard, O.; Favia, P.; Mitard, J.; Mocuta, D.; Langer, R.; Collaert, N.
Title Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures Type A1 Journal article
Year (down) 2018 Publication ECS journal of solid state science and technology Abbreviated Journal Ecs J Solid State Sc
Volume 7 Issue 2 Pages P66-P72
Keywords A1 Journal article; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
Abstract Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET and Gate All Around devices. We use Si4H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330 degrees. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions. (C) The Author(s) 2018. Published by ECS.
Address
Corporate Author Thesis
Publisher Electrochemical society Place of Publication Pennington (N.J.) Editor
Language Wos 000425215200010 Publication Date 2018-01-21
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 2162-8769; 2162-8777 ISBN Additional Links UA library record; WoS full record; WoS citing articles
Impact Factor 1.787 Times cited 5 Open Access OpenAccess
Notes Approved Most recent IF: 1.787
Call Number UA @ lucian @ c:irua:149326 Serial 4933
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Author Yu, H.; Schaekers, M.; Chew, S.A.; Eyeraert, J.-L.; Dabral, A.; Pourtois, G.; Horiguchi, N.; Mocuta, D.; Collaert, N.; De Meyer, K.
Title Titanium (germano-)silicides featuring 10-9 Ω.cm2 contact resistivity and improved compatibility to advanced CMOS technology Type P1 Proceeding
Year (down) 2018 Publication 2018 18th International Workshop On Junction Technology (iwjt) Abbreviated Journal
Volume Issue Pages 80-84 T2 - 18th International Workshop on Junction
Keywords P1 Proceeding; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
Abstract uIn this work, we discuss three novel Ti (germano-)silicidation techniques featuring respectively the pre-contact amorphization implantation (PCAI), the TiSi co-deposition, and Ti atomic layer deposition (ALD). All three techniques form TiSix(Ge-y) contacts with ultralow contact resistivity (rho(c)) of (1-3)x10(-9) Omega.cm(2) on both highly doped n-Si and p-SiGe substrates: these techniques meet rho(c) requirement of 5-14 nm CMOS technology and feature unified CMOS contact solutions. We further discuss the compatibility of these techniques to the realistic CMOS transistor fabrication.
Address
Corporate Author Thesis
Publisher Place of Publication Editor
Language Wos 000502768600020 Publication Date
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 978-1-5386-4511-6; 978-1-5386-4511-6 ISBN Additional Links UA library record; WoS full record
Impact Factor Times cited Open Access
Notes Approved no
Call Number UA @ admin @ c:irua:165190 Serial 8673
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Author Loo, R.; Arimura, H.; Cott, D.; Witters, L.; Pourtois, G.; Schulze, A.; Douhard, B.; Vanherle, W.; Eneman, G.; Richard, O.; Favia, P.; Mitard, J.; Mocuta, D.; Langer, R.; Collaert, N.
Title Epitaxial CVD growth of ultra-thin Si passivation layers on strained Ge fin structures Type P1 Proceeding
Year (down) 2017 Publication Semiconductor Process Integration 10 Abbreviated Journal
Volume Issue Pages 241-252
Keywords P1 Proceeding; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT)
Abstract Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET devices. We use Si4H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330 degrees C. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during the Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions.
Address
Corporate Author Thesis
Publisher Electrochemical soc inc Place of Publication Pennington Editor
Language Wos 000426269800024 Publication Date 2017-10-17
Series Editor Series Title Abbreviated Series Title
Series Volume 80 Series Issue 4 Edition
ISSN 978-1-60768-821-1; 978-1-62332-473-5 ISBN Additional Links UA library record; WoS full record
Impact Factor Times cited Open Access Not_Open_Access
Notes Approved Most recent IF: NA
Call Number UA @ lucian @ c:irua:149965 Serial 4966
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