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Author |
Loo, R.; Arimura, H.; Cott, D.; Witters, L.; Pourtois, G.; Schulze, A.; Douhard, B.; Vanherle, W.; Eneman, G.; Richard, O.; Favia, P.; Mitard, J.; Mocuta, D.; Langer, R.; Collaert, N. |
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Title |
Epitaxial CVD growth of ultra-thin Si passivation layers on strained Ge fin structures |
Type |
P1 Proceeding |
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Year |
2017 |
Publication |
Semiconductor Process Integration 10 |
Abbreviated Journal |
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Volume |
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Issue |
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Pages |
241-252 |
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Keywords |
P1 Proceeding; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT) |
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Abstract |
Epitaxially grown ultra-thin Si layers are often used to passivate Ge surfaces in the high-k gate module of (strained) Ge FinFET devices. We use Si4H10 as Si precursor as it enables epitaxial Si growth at temperatures down to 330 degrees C. C-V characteristics of blanket capacitors made on Ge virtual substrates point to the presence of an optimal Si thickness. In case of compressively strained Ge fin structures, the Si growth results in non-uniform and high strain levels in the strained Ge fin. These strain levels have been calculated for different shapes of the Ge fin and in function of the grown Si thickness. The high strain is the driving force for potential (unwanted) Ge surface reflow during the Si deposition. The Ge surface reflow is strongly affected by the strength of the H-passivation during Si-capping and can be avoided by carefully selected process conditions. |
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Publisher |
Electrochemical soc inc |
Place of Publication |
Pennington |
Editor |
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Wos |
000426269800024 |
Publication Date |
2017-10-17 |
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Series Editor |
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Series Title |
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Abbreviated Series Title |
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Series Volume |
80 |
Series Issue |
4 |
Edition |
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ISSN |
978-1-60768-821-1; 978-1-62332-473-5 |
ISBN |
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Additional Links |
UA library record; WoS full record |
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Times cited |
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Open Access |
Not_Open_Access |
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Notes |
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Approved |
Most recent IF: NA |
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Call Number |
UA @ lucian @ c:irua:149965 |
Serial |
4966 |
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Permanent link to this record |