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Author |
Verhulst, A.; Sorée, B.; Leonelli, D.; Vandenberghe, W.G.; Groeseneken, G. |
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Title |
Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor |
Type |
A1 Journal article |
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Year  |
2010 |
Publication |
Journal Of Applied Physics |
Abbreviated Journal |
J Appl Phys |
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Volume |
107 |
Issue |
2 |
Pages |
024518,1-024518,8 |
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Keywords |
A1 Journal article; Electron Microscopy for Materials Science (EMAT); |
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Abstract |
Tunnel field-effect transistors (TFETs) are potential successors of metal-oxide-semiconductor FETs because scaling the supply voltage below 1 V is possible due to the absence of a subthreshold-swing limit of 60 mV/decade. The modeling of the TFET performance, however, is still preliminary. We have developed models allowing a direct comparison between the single-gate, double-gate, and gate-all-around configuration at high drain voltage, when the drain-voltage dependence is negligible, and we provide improved insight in the TFET physics. The dependence of the tunnel current on device parameters is analyzed, in particular, the scaling with gate-dielectric thickness, channel thickness, and dielectric constants of gate dielectric and channel material. We show that scaling the gate-dielectric thickness improves the TFET performance more than scaling the channel thickness and that improvements are often overestimated. There is qualitative agreement between our model and our experimental data. |
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Publisher |
American Institute of Physics |
Place of Publication |
New York, N.Y. |
Editor |
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Language |
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Wos |
000274180600122 |
Publication Date |
2010-01-28 |
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ISSN |
0021-8979; |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
2.068 |
Times cited |
150 |
Open Access |
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Notes |
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Approved |
Most recent IF: 2.068; 2010 IF: 2.079 |
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Call Number |
UA @ lucian @ c:irua:89507 |
Serial |
2146 |
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| Permanent link to this record |
