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Author |
Bizindavyi, J.; Verhulst, A.S.; Verreck, D.; Sorée, B.; Groeseneken, G. |
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Title |
Large variation in temperature dependence of band-to-band tunneling current in tunnel devices |
Type |
A1 Journal article |
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Year  |
2019 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
40 |
Issue |
11 |
Pages |
1864-1867 |
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Keywords |
A1 Journal article; Condensed Matter Theory (CMT) |
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Abstract |
The observation of a significant temperature-dependent variation in the ${I}$ – ${V}$ characteristics of tunneling devices is often interpreted as a signature of a trap-assisted-tunneling dominated current. In this letter, we use a ballistic 2D quantum-mechanical simulator, calibrated using the measured temperature-dependent ${I}$ – ${V}$ characteristics of Esaki diodes, to demonstrate that the temperature dependence of band-to-band tunneling (BTBT) current can vary significantly in both Esaki diodes and tunnel FETs. The variation of BTBT current with temperature is impacted by doping concentration, gate voltage, possible presence of a highly-doped pocket at the tunnel junction, and material. |
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Wos |
000496192600040 |
Publication Date |
2019-09-05 |
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Edition |
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ISSN |
0741-3106 |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
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Open Access |
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Notes |
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Approved |
Most recent IF: 3.048 |
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Call Number |
UA @ admin @ c:irua:164636 |
Serial |
6306 |
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Author |
Contino, A.; Ciofi, I.; Wu, X.; Asselberghs, I.; Celano, U.; Wilson, C.J.; Tokei, Z.; Groeseneken, G.; Sorée, B. |
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Title |
Modeling of edge scattering in graphene interconnects |
Type |
A1 Journal article |
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Year |
2018 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
39 |
Issue |
7 |
Pages |
1085-1088 |
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Keywords |
A1 Journal article; Condensed Matter Theory (CMT) |
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Abstract |
Graphene interconnects are being considered as a promising candidate for beyond CMOS applications, thanks to the intrinsic higher carrier mobility, lower aspect ratio and better reliability with respect to conventional Cu damascene interconnects. However, similarly to Cu, line edge roughness can seriously affect graphene resistance, something which must be taken into account when evaluating the related performance benefits. In this letter, we present a model for assessing the impact of edge scattering on the resistance of graphene interconnects. Our model allows the evaluation of the total mean free path in graphene lines as a function of graphene width, diffusive scattering probability and edge roughness standard deviation and autocorrelation length. We compare our model with other models from literature by benchmarking them using the same set of experimental data. We show that, as opposed to the considered models from literature, our model is capable to describe the mobility drop with scaling caused by significantly rough edges. |
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Wos |
000437087400041 |
Publication Date |
2018-05-07 |
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Series Volume |
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Edition |
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ISSN |
0741-3106 |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
1 |
Open Access |
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Notes |
; ; |
Approved |
Most recent IF: 3.048 |
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Call Number |
UA @ lucian @ c:irua:152465UA @ admin @ c:irua:152465 |
Serial |
5114 |
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Author |
Verreck, D.; Verhulst, A.S.; Van de Put, M.L.; Sorée, B.; Collaert, N.; Mocuta, A.; Thean, A.; Groeseneken, G. |
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Title |
Uniform strain in heterostructure tunnel field-effect transistors |
Type |
A1 Journal article |
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Year |
2016 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
37 |
Issue |
37 |
Pages |
337-340 |
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Keywords |
A1 Journal article; Condensed Matter Theory (CMT) |
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Abstract |
Strain can strongly impact the performance of III-V tunnel field-effect transistors (TFETs). However, previous studies on homostructure TFETs have found an increase in ON-current to be accompanied with a degradation of subthreshold swing. We perform 30-band quantum mechanical simulations of staggered heterostructure p-n-i-n TFETs submitted to uniaxial and biaxial uniform stress and find the origin of the subthreshold degradation to be a reduction of the density of states in the strained case. We apply an alternative configuration including a lowly doped pocket in the source, which allows to take full benefit of the strain-induced increase in ON-current. |
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Wos |
000372372100026 |
Publication Date |
2016-01-27 |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0741-3106 |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
17 |
Open Access |
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Notes |
; This work was supported by the imec Industrial Affiliation Program. The work of D. Verreck was supported by the Agency for Innovation by Science and Technology in Flanders. The review of this letter was arranged by Editor Z. Chen. ; |
Approved |
Most recent IF: 3.048 |
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Call Number |
UA @ lucian @ c:irua:133207 |
Serial |
4271 |
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Author |
Clima, S.; Chen, Y.Y.; Fantini, A.; Goux, L.; Degraeve, R.; Govoreanu, B.; Pourtois, G.; Jurczak, M. |
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Title |
Intrinsic tailing of resistive states distributions in amorphous <tex>HfOx </tex> and TaOx based resistive random access memories |
Type |
A1 Journal article |
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Year |
2015 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
36 |
Issue |
36 |
Pages |
769-771 |
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Keywords |
A1 Journal article; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT) |
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Abstract |
We report on the ineffectiveness of programming oxide-based resistive random access memory (OxRAM) at low current with a program and verify algorithm due to intrinsic relaxation of the verified distribution to the natural state distribution obtained by single-pulse programming without verify process. Based on oxygen defect formation thermodynamics and on their diffusion barriers in amorphous HfOx and TaOx, we describe the intrinsic nature of tailing of the verified low resistive state and high resistive state distributions. We introduce different scenarios to explain fast distribution widening phenomenon, which is a fundamental limitation for OxRAM current scaling and device reliability. |
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Wos |
000358570300011 |
Publication Date |
2015-06-23 |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0741-3106 |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
33 |
Open Access |
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Notes |
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Approved |
Most recent IF: 3.048; 2015 IF: 2.754 |
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Call Number |
UA @ lucian @ c:irua:134412 |
Serial |
4200 |
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Author |
Toledano-Luque, M.; Matagne, P.; Sibaja-Hernandez, A.; Chiarella, T.; Ragnarsson, L.-A.; Sorée, B.; Cho, M.; Mocuta, A.; Thean, A. |
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Title |
Superior reliability of junctionless pFinFETs by reduced oxide electric field |
Type |
A1 Journal article |
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Year |
2014 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
35 |
Issue |
12 |
Pages |
1179-1181 |
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Keywords |
A1 Journal article; Condensed Matter Theory (CMT) |
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Abstract |
Superior reliability of junctionless (JL) compared with inversion-mode field-effect transistors (FETs) is experimentally demonstrated on bulk FinFET wafers. The reduced negative bias temperature instability (NBTI) of JL pFETs outperforms the previously reported best NBTI reliability data obtained with Si channel devices and guarantees 10-year lifetime at typical operating voltages and high temperature. This behavior is understood through the reduced oxide electric field and lessened interaction between charge carriers and oxide traps during device operation. These findings encourage the investigation of JL devices with alternative channels as a promising alternative for 7-nm technology nodes meeting reliability targets. |
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Wos |
000345575400006 |
Publication Date |
2014-10-21 |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0741-3106;1558-0563; |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
13 |
Open Access |
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Notes |
; This work was supported by the imec's Core Partner Program. The review of this letter was arranged by Editor J. Schmitz. ; |
Approved |
Most recent IF: 3.048; 2014 IF: 2.754 |
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Call Number |
UA @ lucian @ c:irua:122192 |
Serial |
3378 |
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Author |
Clima, S.; Kaczer, B.; Govoreanu, B.; Popovici, M.; Swerts, J.; Verhulst, A.S.; Jurczak, M.; De Gendt, S.; Pourtois, G. |
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Title |
Determination of ultimate leakage through rutile TiO2 and tetragonal ZrO2 from ab initio complex band calculations |
Type |
A1 Journal article |
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Year |
2013 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
34 |
Issue |
3 |
Pages |
402-404 |
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Keywords |
A1 Journal article; Plasma Lab for Applications in Sustainability and Medicine – Antwerp (PLASMANT) |
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Abstract |
First-principle complex band structures have been computed for rutile TiO2 and tetragonal ZrO2 insulating materials that are of current technological relevance to dynamic random accessmemorymetal-insulator-metal (MIM) capacitors. From the magnitude of the complex wave vectors in different orientations, the most penetrating orientations have been identified. Tunneling effective masses m(tunnel) have been extracted, are shown to be a crucial parameter for the intrinsic leakage, and are identified to be an important parameter in further scaling of MIM capacitors. |
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Wos |
000315723000024 |
Publication Date |
2013-01-31 |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0741-3106;1558-0563; |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
3 |
Open Access |
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Notes |
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Approved |
Most recent IF: 3.048; 2013 IF: 3.023 |
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Call Number |
UA @ lucian @ c:irua:108295 |
Serial |
680 |
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Author |
Katti, G.; Stucchi, M.; Velenis, D.; Sorée, B.; de Meyer, K.; Dehaene, W. |
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Title |
Temperature-dependent modeling and characterization of through-silicon via capacitance |
Type |
A1 Journal article |
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Year |
2011 |
Publication |
IEEE electron device letters |
Abbreviated Journal |
Ieee Electr Device L |
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Volume |
32 |
Issue |
4 |
Pages |
563-565 |
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Keywords |
A1 Journal article; Condensed Matter Theory (CMT) |
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Abstract |
A semianalytical model of the through-silicon via (TSV) capacitance for elevated operating temperatures is derived and verified with electrical measurements. The effect of temperature on the increase in TSV capacitance over different technology parameters is explored, and it is shown that higher oxide thickness reduces the impact of temperature rise on TSV capacitance, while with low doped substrates, which are instrumental for reducing the TSV capacitance, the sensitivity of TSV capacitance to temperature is large and cannot be ignored. |
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Wos |
000288664800045 |
Publication Date |
2011-03-04 |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0741-3106;1558-0563; |
ISBN |
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Additional Links |
UA library record; WoS full record; WoS citing articles |
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Impact Factor |
3.048 |
Times cited |
27 |
Open Access |
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Notes |
; ; |
Approved |
Most recent IF: 3.048; 2011 IF: 2.849 |
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Call Number |
UA @ lucian @ c:irua:89402 |
Serial |
3498 |
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