Abstract: Heterostructures of III-V materials under a mechanical strain are being actively researched to enhance the performance of the tunnel field-effect transistor (TFET). In scaled III-V device structures, however, the interplay between the effects of strain and quantum confinement on the semiconductor band structure and hence the performance is highly non-trivial. We have therefore developed a computationally efficient quantum mechanical simulator Pharos, which enables self-consistent full-zone k.p-based simulations of III-V TFETs under a general non-uniform strain. We present the self-consistent procedure and demonstrate it on confined staggered bandgap GaAs0.5Sb0.5/In0.53Ga0.47As TFETs. We find a large performance degradation due to size-induced quantum confinement compared to non-confined devices. We show that some performance can be regained either by applying a uniform biaxial tensile strain or through the non-uniform strain profile at a lattice-mismatched heterostructure.

Abstract: Non-charge-based logic devices are promising candidates for future logic circuits. Interest in studying and developing these devices has grown dramatically in the past decade as they possess key advantages over conventional CMOS technology. Due to their novel designs, a large number of micromagnetic simulations are required to fully characterize the behavior of these devices. The number and complexity of these simulations place large computational requirements on device development. We use state-of-the-art machine learning techniques to expedite identification of their behavior. Several intelligent sampling strategies are combined with machine learning multi-class classification models. These techniques are applied to a recently developed exchange-driven magnetic logic scheme that utilizes direct exchange coupling as the main driver.