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“Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor”. Verhulst A, Sorée B, Leonelli D, Vandenberghe WG, Groeseneken G, Journal Of Applied Physics 107, 024518 (2010). http://doi.org/10.1063/1.3277044
Abstract: Tunnel field-effect transistors (TFETs) are potential successors of metal-oxide-semiconductor FETs because scaling the supply voltage below 1 V is possible due to the absence of a subthreshold-swing limit of 60 mV/decade. The modeling of the TFET performance, however, is still preliminary. We have developed models allowing a direct comparison between the single-gate, double-gate, and gate-all-around configuration at high drain voltage, when the drain-voltage dependence is negligible, and we provide improved insight in the TFET physics. The dependence of the tunnel current on device parameters is analyzed, in particular, the scaling with gate-dielectric thickness, channel thickness, and dielectric constants of gate dielectric and channel material. We show that scaling the gate-dielectric thickness improves the TFET performance more than scaling the channel thickness and that improvements are often overestimated. There is qualitative agreement between our model and our experimental data.
Keywords: A1 Journal article; Electron Microscopy for Materials Science (EMAT);
Impact Factor: 2.068
Times cited: 150
DOI: 10.1063/1.3277044
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