Abstract: Transition-metal dichalcogenides such as MoS2 or WS2 are semiconducting materials with a layered structure. One single layer consists of a plane of metal atoms terminated on the top and bottom by the chalcogen atoms sulfur, selenium, or tellurium. These layers show strong in-plane covalent bonding, whereas the Van-der-Waals bonds in between adjacent layers are weak. Those weak bonds allow the microcleavage and extraction of a monolayer. Transistors built on such monolayer nanosheets are promising due to high electrostatic controllability in comparison to a bulk semiconductor. This is important for fast switching speed and low-power consumption in the OFF-state. Nonetheless, prototypes of such nanosheet transistors show non-idealities due to the fabrication process. Closed films on a large area cannot be obtained by mechanical exfoliation from mm-sized crystals. For wafer-level processing, synthetic growth methods are needed. It is a challenge to obtain a few layer thick crystals with large lateral grains or even without grain boundaries with synthetic growth techniques. This requires pre-conditioned monocrystalline substrates, high-temperature deposition, and polymer-assisted transfer to other target substrates after the growth. Such transfer is a source of cracks in the film and degrades the layers' promising properties by residual polymer from the bond material. Apart from transfer, patterning of the stacked 2D layers is necessary to build devices. The patterning of a 2D material itself or another material on top of it is challenging. The integration of the nanosheets into miniaturized devices cannot be done by conventional continuous-wave dry etching techniques due to the absence of etch stop layers and the vulnerability of these thin layers. To eliminate these issues in growth and integration, we explored the deposition methods on wafer-level and low-damage integration schemes. To this end, we studied the growth of MoS2 by a hybrid physical-chemical vapor deposition for which metal layers were deposited and subsequently sulfurized in H2S to obtain large area 2D layers. The impact of sulfurization temperature, time, partial H2S pressure, and H2 addition on the stoichiometry, crystallinity, and roughness were explored. Furthermore, a selective low-temperature deposition and conversion process at 450 °C for WS2 by the precursors WF6, H2S, and Si was considered. Si was used as a reducing agent for WF6 to deposit thin W films and H2S sulfurized this film in situ. The impact of the reducing agent amount, its surface condition, the temperature window, and the necessary time for the conversion of Si into W and W into WS2 were studied. Further quality improvement strategies on the WS2 were implemented by using extra capping layers in combination with annealing. Capping layers such as Ni and Co for metal-induced crystallization were compared to dielectric capping layers. The impact of the metal capping layer and its thickness on the recrystallization was evaluated. The dielectric capping layer's property to suppress sulfur loss under high temperature was explored. The annealings, which were done by rapid thermal annealing and nanosecond laser annealing, were discussed. Eventually, the fabrication of a heterostack with a MoS2 base layer and selectively grown WS2 was studied. Atomic layer etching was identified as attractive technique to remove the solid precursor Si from MoS2 in a layer-by-layer fashion. The in-situ removal of native SiO2 and the impact towards MoS2 was determined. The created patterned Si on MoS2 was then converted into patterned WS2 on MoS2 by the selective WF6/H2S process developed earlier. This procedure offers an attractive, scalable way to enable the fabrication of 2D devices with CMOS-compatible processes and contributes essential progress in the field 2D materials technology.