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Author Verreck, D.; Verhulst, A.S.; Van de Put, M.L.; Sorée, B.; Magnus, W.; Collaert, N.; Mocuta, A.; Groeseneken, G. pdf  doi
openurl 
  Title Self-consistent procedure including envelope function normalization for full-zone Schrodinger-Poisson problems with transmitting boundary conditions Type A1 Journal article
  Year (down) 2018 Publication Journal of applied physics Abbreviated Journal J Appl Phys  
  Volume 124 Issue 20 Pages 204501  
  Keywords A1 Journal article; Condensed Matter Theory (CMT)  
  Abstract In the quantum mechanical simulation of exploratory semiconductor devices, continuum methods based on a k.p/envelope function model have the potential to significantly reduce the computational burden compared to prevalent atomistic methods. However, full-zone k.p/envelope function simulation approaches are scarce and existing implementations are not self-consistent with the calculation of the electrostatic potential due to the lack of a stable procedure and a proper normalization of the multi-band envelope functions. Here, we therefore present a self-consistent procedure based on a full-zone spectral k.p/envelope function band structure model. First, we develop a proper normalization for the multi-band envelope functions in the presence of transmitting boundary conditions. This enables the calculation of the free carrier densities. Next, we construct a procedure to obtain self-consistency of the carrier densities with the electrostatic potential. This procedure is stabilized with an adaptive scheme that relies on the solution of Poisson's equation in the Gummel form, combined with successive underrelaxation. Finally, we apply our procedure to homostructure In0.53Ga0.47As tunnel field-effect transistors (TFETs) and staggered heterostructure GaAs0.5Sb0.5/In0.53Ga0.47As TFETs and show the importance of self-consistency on the device predictions for scaled dimensions. Published by AIP Publishing.  
  Address  
  Corporate Author Thesis  
  Publisher Place of Publication Editor  
  Language Wos 000451743900015 Publication Date 2018-11-30  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0021-8979; 1089-7550 ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor 2.068 Times cited 1 Open Access  
  Notes ; This work was supported by imec's Industrial Affiliation Program. ; Approved Most recent IF: 2.068  
  Call Number UA @ admin @ c:irua:156291 Serial 5228  
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Author Verreck, D.; Verhulst, A.S.; Van de Put, M.L.; Sorée, B.; Magnus, W.; Collaert, N.; Mocuta, A.; Groeseneken, G. pdf  openurl
  Title Self-consistent 30-band simulation approach for (non-)uniformly strained confined heterostructure tunnel field-effect transistors Type P1 Proceeding
  Year (down) 2017 Publication Simulation of Semiconductor Processes and, Devices (SISPAD)AND DEVICES (SISPAD 2017) Abbreviated Journal  
  Volume Issue Pages 29-32  
  Keywords P1 Proceeding; Condensed Matter Theory (CMT)  
  Abstract Heterostructures of III-V materials under a mechanical strain are being actively researched to enhance the performance of the tunnel field-effect transistor (TFET). In scaled III-V device structures, however, the interplay between the effects of strain and quantum confinement on the semiconductor band structure and hence the performance is highly non-trivial. We have therefore developed a computationally efficient quantum mechanical simulator Pharos, which enables self-consistent full-zone k.p-based simulations of III-V TFETs under a general non-uniform strain. We present the self-consistent procedure and demonstrate it on confined staggered bandgap GaAs0.5Sb0.5/In0.53Ga0.47As TFETs. We find a large performance degradation due to size-induced quantum confinement compared to non-confined devices. We show that some performance can be regained either by applying a uniform biaxial tensile strain or through the non-uniform strain profile at a lattice-mismatched heterostructure.  
  Address  
  Corporate Author Thesis  
  Publisher Ieee Place of Publication New york Editor  
  Language Wos Publication Date  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 978-4-86348-610-2 ISBN Additional Links UA library record; WoS full record  
  Impact Factor Times cited Open Access  
  Notes Approved Most recent IF: NA  
  Call Number UA @ lucian @ c:irua:149949 Serial 4978  
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Author Mohammed, M.; Verhulst, A.S.; Verreck, D.; Van de Put, M.; Simoen, E.; Sorée, B.; Kaczer, B.; Degraeve, R.; Mocuta, A.; Collaert, N.; Thean, A.; Groeseneken, G. url  doi
openurl 
  Title Electric-field induced quantum broadening of the characteristic energy level of traps in semiconductors and oxides Type A1 Journal article
  Year (down) 2016 Publication Journal of applied physics Abbreviated Journal J Appl Phys  
  Volume 120 Issue 120 Pages 245704  
  Keywords A1 Journal article; Condensed Matter Theory (CMT)  
  Abstract The trap-assisted tunneling (TAT) current in tunnel field-effect transistors (TFETs) is one of the crucial factors degrading the sub-60 mV/dec sub-threshold swing. To correctly predict the TAT currents, an accurate description of the trap is required. Since electric fields in TFETs typically reach beyond 10(6) V/cm, there is a need to quantify the impact of such high field on the traps. We use a quantum mechanical implementation based on the modified transfer matrix method to obtain the trap energy level. We present the qualitative impact of electric field on different trap configurations, locations, and host materials, including both semiconductors and oxides. We determine that there is an electric-field related trap level shift and level broadening. We find that these electric-field induced quantum effects can enhance the trap emission rates. Published by AIP Publishing.  
  Address  
  Corporate Author Thesis  
  Publisher American Institute of Physics Place of Publication New York, N.Y. Editor  
  Language Wos 000392174000028 Publication Date 2016-12-26  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0021-8979; 1089-7550 ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor 2.068 Times cited 6 Open Access  
  Notes ; This work was supported by imec's Industrial Affiliation Program. D. Verreck acknowledges the support of a PhD stipend from IWT-Vlaanderen. ; Approved Most recent IF: 2.068  
  Call Number UA @ lucian @ c:irua:141481 Serial 4593  
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Author Verreck, D.; Verhulst, A.S.; Van de Put, M.L.; Sorée, B.; Collaert, N.; Mocuta, A.; Thean, A.; Groeseneken, G. pdf  url
doi  openurl
  Title Uniform strain in heterostructure tunnel field-effect transistors Type A1 Journal article
  Year (down) 2016 Publication IEEE electron device letters Abbreviated Journal Ieee Electr Device L  
  Volume 37 Issue 37 Pages 337-340  
  Keywords A1 Journal article; Condensed Matter Theory (CMT)  
  Abstract Strain can strongly impact the performance of III-V tunnel field-effect transistors (TFETs). However, previous studies on homostructure TFETs have found an increase in ON-current to be accompanied with a degradation of subthreshold swing. We perform 30-band quantum mechanical simulations of staggered heterostructure p-n-i-n TFETs submitted to uniaxial and biaxial uniform stress and find the origin of the subthreshold degradation to be a reduction of the density of states in the strained case. We apply an alternative configuration including a lowly doped pocket in the source, which allows to take full benefit of the strain-induced increase in ON-current.  
  Address  
  Corporate Author Thesis  
  Publisher Place of Publication Editor  
  Language Wos 000372372100026 Publication Date 2016-01-27  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0741-3106 ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor 3.048 Times cited 17 Open Access  
  Notes ; This work was supported by the imec Industrial Affiliation Program. The work of D. Verreck was supported by the Agency for Innovation by Science and Technology in Flanders. The review of this letter was arranged by Editor Z. Chen. ; Approved Most recent IF: 3.048  
  Call Number UA @ lucian @ c:irua:133207 Serial 4271  
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Author Verreck, D.; Verhulst, A.S.; Sorée, B.; Collaert, N.; Mocuta, A.; Thean, A.; Groeseneken, G. openurl 
  Title Non-uniform strain in lattice-mismatched heterostructure tunnel field-effect transistors Type P1 Proceeding
  Year (down) 2016 Publication Solid-State Device Research (ESSDERC), European Conference T2 – 46th European Solid-State Device Research Conference (ESSDERC) / 42nd, European Solid-State Circuits Conference (ESSCIRC), SEP 12-15, 2016, Lausanne, SWITZERLAND Abbreviated Journal  
  Volume Issue Pages 412-415  
  Keywords P1 Proceeding; Condensed Matter Theory (CMT)  
  Abstract Because of its localized impact on the band structure, non-uniform strain at the heterojunction between lattice-mismatched materials has the potential to significantly enlarge the design space for tunnel-field effect transistors (TFET). However, the impact of a complex strain profile on TFET performance is difficult to predict. We have therefore developed a 2D quantum mechanical transport formalism capable of simulating the effects of a general non-uniform strain. We demonstrate the formalism for the GaAsxSb(1-x)/InyGa(1-y) As system and show that a performance improvement over a lattice-matched reference is indeed possible, allowing for relaxed requirements on the source doping. We also point out that the added design parameter of mismatch is not free, but limited by the desired effective bandgap at the tunnel junction.  
  Address  
  Corporate Author Thesis  
  Publisher Ieee Place of Publication New york Editor  
  Language Wos Publication Date  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 978-1-5090-2969-3 ISBN Additional Links UA library record; WoS full record  
  Impact Factor Times cited Open Access  
  Notes Approved Most recent IF: NA  
  Call Number UA @ lucian @ c:irua:138233 Serial 4358  
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Author Verreck, D.; Verhulst, A.S.; Van de Put, M.; Sorée, B.; Magnus, W.; Mocuta, A.; Collaert, N.; Thean, A.; Groeseneken, G. doi  openurl
  Title Full-zone spectral envelope function formalism for the optimization of line and point tunnel field-effect transistors Type A1 Journal article
  Year (down) 2015 Publication Journal of applied physics Abbreviated Journal J Appl Phys  
  Volume 118 Issue 118 Pages 134502  
  Keywords A1 Journal article; Condensed Matter Theory (CMT)  
  Abstract Efficient quantum mechanical simulation of tunnel field-effect transistors (TFETs) is indispensable to allow for an optimal configuration identification. We therefore present a full-zone 15-band quantum mechanical solver based on the envelope function formalism and employing a spectral method to reduce computational complexity and handle spurious solutions. We demonstrate the versatility of the solver by simulating a 40 nm wide In0.53Ga0.47As lineTFET and comparing it to p-n-i-n configurations with various pocket and body thicknesses. We find that the lineTFET performance is not degraded compared to semi-classical simulations. Furthermore, we show that a suitably optimized p-n-i-n TFET can obtain similar performance to the lineTFET. (C) 2015 AIP Publishing LLC.  
  Address  
  Corporate Author Thesis  
  Publisher American Institute of Physics Place of Publication New York, N.Y. Editor  
  Language Wos 000362668400025 Publication Date 2015-10-01  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0021-8979; 1089-7550 ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor 2.068 Times cited 9 Open Access  
  Notes ; D. Verreck acknowledges the support of a Ph.D. stipend from the Institute for the Promotion of Innovation through Science and Technology in Flanders (IWT-Vlaanderen). This work was supported by imec's Industrial Affiliation Program. ; Approved Most recent IF: 2.068; 2015 IF: 2.183  
  Call Number UA @ lucian @ c:irua:128765 Serial 4183  
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Author Verreck, D.; Verhulst, A.S.; Sorée, B.; Collaert, N.; Mocuta, A.; Thean, A.; Groeseneken, G. doi  openurl
  Title Improved source design for p-type tunnel field-effect transistors : towards truly complementary logic Type A1 Journal article
  Year (down) 2014 Publication Applied physics letters Abbreviated Journal Appl Phys Lett  
  Volume 105 Issue 24 Pages 243506  
  Keywords A1 Journal article; Condensed Matter Theory (CMT)  
  Abstract Complementary logic based on tunnel field-effect transistors (TFETs) would drastically reduce power consumption thanks to the TFET's potential to obtain a sub-60 mV/dec subthreshold swing (SS). However, p-type TFETs typically do not meet the performance of n-TFETs for direct bandgap III-V configurations. The p-TFET SS stays well above 60 mV/dec, due to the low density of states in the conduction band. We therefore propose a source configuration in which a highly doped region is maintained only near the tunnel junction. In the remaining part of the source, the hot carriers in the exponential tail of the Fermi-Dirac distribution are blocked by reducing the doping degeneracy, either with a source section with a lower doping concentration or with a heterostructure. We apply this concept to n-p-i-p configurations consisting of In0.53Ga0.47As and an InP-InAs heterostructure. 15-band quantum mechanical simulations predict that the configurations with our source design can obtain sub-60 mV/dec SS, with an on-current comparable to the conventional source design. (C) 2014 AIP Publishing LLC.  
  Address  
  Corporate Author Thesis  
  Publisher American Institute of Physics Place of Publication New York, N.Y. Editor  
  Language Wos 000346643600076 Publication Date 2014-12-17  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0003-6951;1077-3118; ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor 3.411 Times cited 10 Open Access  
  Notes ; D. Verreck acknowledges the support of a Ph.D. stipend from the Institute for the Promotion of Innovation through Science and Technology in Flanders (IWT-Vlaanderen). This work was supported by imec's Industrial Affiliation Program. ; Approved Most recent IF: 3.411; 2014 IF: 3.302  
  Call Number UA @ lucian @ c:irua:122798 Serial 1568  
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Author Toledano-Luque, M.; Matagne, P.; Sibaja-Hernandez, A.; Chiarella, T.; Ragnarsson, L.-A.; Sorée, B.; Cho, M.; Mocuta, A.; Thean, A. doi  openurl
  Title Superior reliability of junctionless pFinFETs by reduced oxide electric field Type A1 Journal article
  Year (down) 2014 Publication IEEE electron device letters Abbreviated Journal Ieee Electr Device L  
  Volume 35 Issue 12 Pages 1179-1181  
  Keywords A1 Journal article; Condensed Matter Theory (CMT)  
  Abstract Superior reliability of junctionless (JL) compared with inversion-mode field-effect transistors (FETs) is experimentally demonstrated on bulk FinFET wafers. The reduced negative bias temperature instability (NBTI) of JL pFETs outperforms the previously reported best NBTI reliability data obtained with Si channel devices and guarantees 10-year lifetime at typical operating voltages and high temperature. This behavior is understood through the reduced oxide electric field and lessened interaction between charge carriers and oxide traps during device operation. These findings encourage the investigation of JL devices with alternative channels as a promising alternative for 7-nm technology nodes meeting reliability targets.  
  Address  
  Corporate Author Thesis  
  Publisher Place of Publication Editor  
  Language Wos 000345575400006 Publication Date 2014-10-21  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0741-3106;1558-0563; ISBN Additional Links UA library record; WoS full record; WoS citing articles  
  Impact Factor 3.048 Times cited 13 Open Access  
  Notes ; This work was supported by the imec's Core Partner Program. The review of this letter was arranged by Editor J. Schmitz. ; Approved Most recent IF: 3.048; 2014 IF: 2.754  
  Call Number UA @ lucian @ c:irua:122192 Serial 3378  
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Author Verhulst, A.S.; Verreck, D.; Smets, Q.; Kao, K.-H.; Van de Put, M.; Rooyackers, R.; Sorée, B.; Vandooren, A.; De Meyer, K.; Groeseneken, G.; Heyns, M.M.; Mocuta, A.; Collaert, N.; Thean, A.V.-Y. openurl 
  Title Perspective of tunnel-FET for future low-power technology nodes Type P1 Proceeding
  Year (down) 2014 Publication 2014 Ieee International Electron Devices Meeting (iedm) Abbreviated Journal  
  Volume Issue Pages  
  Keywords P1 Proceeding; Condensed Matter Theory (CMT)  
  Abstract  
  Address  
  Corporate Author Thesis  
  Publisher Ieee Place of Publication New york Editor  
  Language Wos Publication Date  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 978-1-4799-8000-0 ISBN Additional Links UA library record; WoS full record  
  Impact Factor Times cited Open Access  
  Notes Approved Most recent IF: NA  
  Call Number UA @ lucian @ c:irua:144789 Serial 4679  
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